Section: Contracts and Grants with Industry
Creation of the Start-Up Zettice
Following his PhD, Alexandru Plesco initiated a start-up on high-level synthesis for FPGAs, named Zettice, and the use and extension of tools/techniques developed in Compsys (for high-level code transformations) and Arénaire (for the development of pipelined operators). The results described in Sections 5.7 , 6.9 , 6.10 , and 6.11 are directly linked to this effort.
The incubation of Zettice is supported by Crealys, the “Région Rhône-Alpes”, and Inria: Alexandru Plesco is “ingénieur technologie and innovation” (ITI) since October 2011. Christophe Alias is in charge of the collaboration between Compsys and Zettice.